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Espressif Systems /ESP32-S3 /SPI0 /CACHE_SCTRL

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Interpret as CACHE_SCTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CACHE_USR_SCMD_4BYTE)CACHE_USR_SCMD_4BYTE 0 (USR_SRAM_DIO)USR_SRAM_DIO 0 (USR_SRAM_QIO)USR_SRAM_QIO 0 (USR_WR_SRAM_DUMMY)USR_WR_SRAM_DUMMY 0 (USR_RD_SRAM_DUMMY)USR_RD_SRAM_DUMMY 0 (CACHE_SRAM_USR_RCMD)CACHE_SRAM_USR_RCMD 0SRAM_RDUMMY_CYCLELEN 0SRAM_ADDR_BITLEN 0 (CACHE_SRAM_USR_WCMD)CACHE_SRAM_USR_WCMD 0 (SRAM_OCT)SRAM_OCT 0SRAM_WDUMMY_CYCLELEN

Description

SPI0 external RAM control register

Fields

CACHE_USR_SCMD_4BYTE

Set this bit to enable SPI0 read Ext_RAM with 32 bits address. The value of SPI_MEM_SRAM_ADDR_BITLEN should be 31.
USR_SRAM_DIO

Set the bit to enable 2-bm in all the phases of SPI0 Ext_RAM transfer.
USR_SRAM_QIO

Set the bit to enable QPI mode in all SPI0 Ext_RAM transfer.
USR_WR_SRAM_DUMMY

When SPI0 accesses to Ext_RAM, set this bit to enable DUMMY phase in write operations.
USR_RD_SRAM_DUMMY

When SPI0 accesses to Ext_RAM, set this bit to enable DUMMY phase in read operations.
CACHE_SRAM_USR_RCMD

1: The command value of SPI0 read Ext_RAM is SPI_MEM_CACHE_SRAM_USR_WR_CMD_VALUE. 0: The value is 0x2.
SRAM_RDUMMY_CYCLELEN

When SPI0 accesses to Ext_RAM, it is the SPI_CLK cycles minus 1 of DUMMY phase in read data transfer.
SRAM_ADDR_BITLEN

When SPI0 accesses to Ext_RAM, it is the length in bits of ADDR phase. The register value shall be (bit_num-1).
CACHE_SRAM_USR_WCMD

1: The command value of SPI0 write Ext_RAM is SPI_MEM_CACHE_SRAM_USR_RD_CMD_VALUE. 0: The value is 0x3.
SRAM_OCT

Set the bit to enable OPI mode in all SPI0 Ext_RAM transfer.
SRAM_WDUMMY_CYCLELEN

When SPI0 accesses to Ext_RAM, it is the SPI_CLK cycles minus 1 of DUMMY phase in write data transfer.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data